SH7751 Datasheet, PDF (68/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17.2 Register Descriptions ........................................................................................................ 722
17.2.1 Smart Card Mode Register (SCSCMR1) ............................................................. 722
17.2.2 Serial Mode Register (SCSMR1)......................................................................... 723
17.2.3 Serial Control Register (SCSCR1)....................................................................... 724
17.2.4 Serial Status Register (SCSSR1).......................................................................... 725
17.3 Operation .......................................................................................................................... 726
17.3.1 Overview.............................................................................................................. 726
17.3.2 Pin Connections ................................................................................................... 727
17.3.3 Data Format ......................................................................................................... 728
17.3.4 Register Settings .................................................................................................. 729
17.3.5 Clock.................................................................................................................... 731
17.3.6 Data Transfer Operations..................................................................................... 734
17.4 Usage Notes ...................................................................................................................... 741
Section 18 I/O Ports............................................................................................................ 747
18.1 Overview........................................................................................................................... 747
18.1.1 Features................................................................................................................ 747
18.1.2 Block Diagrams ................................................................................................... 748
18.1.3 Pin Configuration................................................................................................. 755
18.1.4 Register Configuration......................................................................................... 758
18.2 Register Descriptions ........................................................................................................ 759
18.2.1 Port Control Register A (PCTRA) ....................................................................... 759
18.2.2 Port Data Register A (PDTRA) ........................................................................... 760
18.2.3 Port Control Register B (PCTRB) ....................................................................... 761
18.2.4 Port Data Register B (PDTRB)............................................................................ 762
18.2.5 GPIO Interrupt Control Register (GPIOIC)......................................................... 763
18.2.6 Serial Port Register (SCSPTR1) .......................................................................... 764
18.2.7 Serial Port Register (SCSPTR2) .......................................................................... 765
Section 19 Interrupt Controller (INTC) ........................................................................ 769
19.1 Overview........................................................................................................................... 769
19.1.1 Features................................................................................................................ 769
19.1.2 Block Diagram..................................................................................................... 769
19.1.3 Pin Configuration................................................................................................. 771
19.1.4 Register Configuration......................................................................................... 771
19.2 Interrupt Sources............................................................................................................... 772
19.2.1 NMI Interrupt....................................................................................................... 772
19.2.2 IRL Interrupts ...................................................................................................... 773
19.2.3 On-Chip Peripheral Module Interrupts ................................................................ 775
19.2.4 Interrupt Exception Handling and Priority........................................................... 776
Rev.4.00 Oct. 10, 2008 Page lxviii of xcviii
REJ09B0370-0400