SH7751 Datasheet, PDF (71/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22.2.5 PCI Configuration Register 4 (PCICONF4) ........................................................ 867
22.2.6 PCI Configuration Register 5 (PCICONF5) ........................................................ 869
22.2.7 PCI Configuration Register 6 (PCICONF6) ........................................................ 871
22.2.8 PCI Configuration Register 7 (PCICONF7) to PCI Configuration Register 10
(PCICONF10) ...................................................................................................... 873
22.2.9 PCI Configuration Register 11 (PCICONF11) .................................................... 874
22.2.10 PCI Configuration Register 12 (PCICONF12) .................................................... 875
22.2.11 PCI Configuration Register 13 (PCICONF13) .................................................... 875
22.2.12 PCI Configuration Register 14 (PCICONF14) .................................................... 876
22.2.13 PCI Configuration Register 15 (PCICONF15) .................................................... 877
22.2.14 PCI Configuration Register 16 (PCICONF16) .................................................... 879
22.2.15 PCI Configuration Register 17 (PCICONF17) .................................................... 881
22.2.16 Reserved Area...................................................................................................... 883
22.2.17 PCI Control Register (PCICR)............................................................................. 884
22.2.18 PCI Local Space Register [1:0] (PCILSR [1:0]) .................................................. 888
22.2.19 PCI Local Address Register [1:0] (PCILAR [1:0]).............................................. 890
22.2.20 PCI Interrupt Register (PCIINT).......................................................................... 892
22.2.21 PCI Interrupt Mask Register (PCIINTM) ............................................................ 895
22.2.22 PCI Address Data Register at Error (PCIALR) ................................................... 897
22.2.23 PCI Command Data Register at Error (PCICLR) ................................................ 898
22.2.24 PCI Arbiter Interrupt Register (PCIAINT) .......................................................... 900
22.2.25 PCI Arbiter Interrupt Mask Register (PCIAINTM) ............................................. 902
22.2.26 PCI Error Bus Master Data Register (PCIBMLR)............................................... 903
22.2.27 PCI DMA Transfer Arbitration Register (PCIDMABT) ..................................... 904
22.2.28 PCI DMA Transfer PCI Address Register [3:0] (PCIDPA [3:0]) ........................ 905
22.2.29 PCI DMA Transfer Local Bus Start Address Register [3:0] (PCIDLA [3:0]) ..... 907
22.2.30 PCI DMA Transfer Counter Register [3:0] (PCIDTC [3:0]) ............................... 908
22.2.31 PCI DMA Control Register [3:0] (PCIDCR [3:0]) .............................................. 910
22.2.32 PIO Address Register (PCIPAR) ......................................................................... 913
22.2.33 Memory Space Base Register (PCIMBR)............................................................ 915
22.2.34 I/O Space Base Register (PCIIOBR) ................................................................... 917
22.2.35 PCI Power Management Interrupt Register (PCIPINT)....................................... 918
22.2.36 PCI Power Management Interrupt Mask Register (PCIPINTM) ......................... 919
22.2.37 PCI Clock Control Register (PCICLKR) ............................................................. 920
22.2.38 PCIC-BSC Registers............................................................................................ 921
22.2.39 Port Control Register (PCIPCTR)........................................................................ 923
22.2.40 Port Data Register (PCIPDTR) ............................................................................ 926
22.2.41 PIO Data Register (PCIPDR)............................................................................... 927
22.3 Description of Operation................................................................................................... 928
22.3.1 Operating Modes.................................................................................................. 928
Rev.4.00 Oct. 10, 2008 Page lxxi of xcviii
REJ09B0370-0400