SH7751 Datasheet, PDF (665/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

CKIO
DBREQ
BAVL
TR
14. Direct Memory Access Controller (DMAC)
A25–A0
RA
CA
D31–D0
D0 D1 D2 D3
RAS, CAS,
WE
BA
RD
Figure 14.35 Read from Synchronous DRAM Precharge Bank
CKIO
DBREQ
BAVL
TR
Transfer requests can be accepted
A25–A0
RA
CA
D31–D0
D0 D1 D2 D3
RAS, CAS,
PCH
BA
RD
WE
Figure 14.36 Read from Synchronous DRAM Non-Precharge Bank (Row Miss)
Rev.4.00 Oct. 10, 2008 Page 567 of 1122
REJ09B0370-0400