SH7751 Datasheet, PDF (862/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

18. I/O Ports
18.2.6 Serial Port Register (SCSPTR1)
Bit:
7
6
5
EIO
—
—
Initial value:
0
0
0
R/W: R/W
—
—
4
3
2
1
0
— SPB1IO SPB1DT SPB0IO SPB0DT
0
0
—
0
—
—
R/W
R/W
R/W
R/W
The serial port register (SCSPTR1) is an 8-bit readable/writable register that controls input/output
and data for the port pins multiplexed with the serial communication interface (SCI) pins. Input
data can be read from the RxD pin, output data written to the TxD pin, and breaks in serial
transmission/reception controlled, by means of bits 1 and 0. SCK pin data reading and output data
writing can be performed by means of bits 3 and 2. Bit 7 controls enabling and disabling of the
RXI interrupt.
SCSPTR1 can be read or written to by the CPU at all times. All SCSPTR1 bits except bits 2 and 0
are initialized to 0 by a power-on reset or manual reset; the value of bits 2 and 0 is undefined.
SCSPTR1 is not initialized in the module standby state or standby mode.
Bit 7—Error Interrupt Only (EIO): See section 15.2.8, Serial Port Register (SCSPTR1).
Bits 6 to 4—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 3—Serial Port Clock Port I/O (SPB1IO): Specifies serial port SCK pin input/output. When
the SCK pin is actually set as a port output pin and outputs the value set by the SPB1DT bit, the
C/A bit in SCSMR1 and the CKE1 and CKE0 bits in SCSCR1 should be cleared to 0.
Bit 3: SPB1IO
0
1
Description
SPB1DT bit value is not output to the SCK pin
SPB1DT bit value is output to the SCK pin
(Initial value)
Bit 2—Serial Port Clock Port Data (SPB1DT): Specifies the serial port SCK pin input/output
data. Input or output is specified by the SPB1IO bit (see the description of bit 3, SPB1IO, for
details). When output is specified, the value of the SPB1DT bit is output to the SCK pin. The SCK
pin value is read from the SPB1DT bit regardless of the value of the SPB1IO bit. The initial value
of this bit after a power-on reset or manual reset is undefined.
Bit 2: SPB1DT
0
1
Description
Input/output data is low-level
Input/output data is high-level
Rev.4.00 Oct. 10, 2008 Page 764 of 1122
REJ09B0370-0400