SH7751 Datasheet, PDF (1027/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
22.3.2 PCI Commands
Table 22.9 lists the PCI commands and shows the PCIC support.
Table 22.9 PCI Command Support
Host Operation
Non-Host
Operation
Command
Master Target Master Target Remarks
Memory read
O
O
O
O
Memory read line
X
Δ
X
Δ
When the target, operates
as memory read
Memory read multiple
X
Δ
X
Δ
When the target, operates
as memory read
Memory write
O
O
O
O
Memory write and invalidate X
Δ
X
Δ
When the target, operates
as memory write
I/O read
O
O
O
O
I/O write
O
O
O
O
Configuration read
O
—
—
O
Configuration write
O
—
—
O
Interrupt acknowledge cycle X
X
X
X
Special cycle
O
—
—
X
Dual address cycle
X
X
X
X
Legend:
O: Supported
Δ: Limited support
X, —: Not issued by PCIC or no response from PCIC
When PCIC Operates as Master: The PCIC supports the memory read command, memory write
command, I/O read command, and I/O write command. When the host functions are enabled, the
configuration command and special cycle can also be used.
When PCIC Operates as Target: The PCIC receives the memory read command, memory write
command, I/O read command, and I/O write command. The memory read line command and
memory read multiple command function as memory reads, while the memory write invalidate
command functions as a memory write. When operating in non-host mode, the PCIC accepts the
configuration command.
Rev.4.00 Oct. 10, 2008 Page 929 of 1122
REJ09B0370-0400