SH7751 Datasheet, PDF (53/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Item
Page
23.3.4 Peripheral
1070
Module Signal Timing
Table 23.26 PCIC
Signal Timing (in
PCIREQ/PCIGNT Non-
Port Mode) (2)
Table 23.27 PCIC
Signal Timing (With
PCIREQ/PCIGNT Port
Settings in Non-Host
Mode) (1)
1072
Table 23.28 PCIC
Signal Timing (With
PCIREQ/PCIGNT Port
Settings in Non-Host
Mode) (2)
Table 23.34 PCIC
⎯
Signal Timing(With
PCIREQ/PCIGNT Port
Settings in Non-Host
Mode)
Revision (See Manual for Details)
Table amended and note added
HD6417751F133 deleted
HD6417751BP167 (V), HD6417751F167 (V):
V_DDQ = 3.0 to 3.6 V, V_DD = 1.8 V, T_a = –20 to 75°C,
C_L = 30 pF
Pin
Item
IDSEL
Input hold time
Input setup time
AD31–AD0 Output data delay time
C/BE3–C/BE0 Tri-state drive delay time
PAR
PCIFRAME
IRDY
TRDY
Tri-state high-impedance
delay time
Input hold time
Input setup time
PCISTOP
PCILOCK
DEVSEL
PERR
PCIREQ1/
GNTIN
PCIREQ2/
MD9
PCIREQ3/
MD10
PCIREQ4/
PCIGNT1/
REQOUT
Output data delay time
Tri-state drive delay time
Tri-state high-impedance
delay time
Input hold time
Input setup time
PCIGNT4–
PCIGNT1
33 MHz
Symbol Min
Max
t_PCIH
t_PCISU
t_PCIVAL
t_PCION
t_PCIOFF
1
—
3.0 (3.5*) —
—
10
—
10
—
12
t_PCIH
t_PCISU
1
—
3.0 (3.5*) —
t_PCIVAL
t_PCION
t_PCIOFF
t_PCIH
t_PCISU
—
10
—
10
—
12
1
—
3.0 (3.5*) —
Note: * HD6417751F167 (V)
66 MHz
Min
Max
1
—
3.0 (3.5*) —
—
10
—
10
—
12
Unit Figure
ns 23.72
ns 23.72
ns 23.71
ns 23.71
ns 23.71
1
—
3.0 (3.5*) —
ns 23.72
ns 23.72
—
10 ns 23.71
—
10 ns 23.71
12 ns 23.71
1
—
3.0 (3.5*) —
ns 23.72
ns 23.72
Table amended
HD6417751RBP240 (V), HD6417751RBP200 (V),
HD6417751RBG240 (V), HD6417751RBG200 (V),
HD6417751RF240 (V), HD6417751RF200 (V):
V = 3.0 to 3.6 V, V = 1.5 V, T = –20 to 75°C, C = 30 pF
DDQ
DD
a
L
Table amended
HD6417751BP167 (V), HD6417751F167 (V):
V = 3.0 to 3.6 V, V = 1.8 V, T = –20 to 75°C, C = 30 pF
DDQ
DD
a
L
Table deleted
Rev.4.00 Oct. 10, 2008 Page liii of xcviii
REJ09B0370-0400