SH7751 Datasheet, PDF (1157/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

23. Electrical Characteristics
Figure 23.57 Memory Byte Control SRAM Bus Cycles
(1) Basic Read Cycle (No Wait)
(2) Basic Read Cycle (One Internal Wait)
(3) Basic Read Cycle (One Internal Wait + One External Wait)
Rev.4.00 Oct. 10, 2008 Page 1059 of 1122
REJ09B0370-0400