SH7751 Datasheet, PDF (455/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. Bus State Controller (BSC)
13.2.2 Bus Control Register 2 (BCR2)
Bus control register 2 (BCR2) is a 32-bit readable/writable register that specifies the bus width for
each area, and whether a 16-bit port is used.
BCR2 is initialized to H'3FFC by a power-on reset, but is not initialized by a manual reset or in
standby mode. External memory space other than area 0 should not be accessed until register
initialization is completed.
Bit:
Initial value:
R/W:
15
A0SZ1
0/1*
R
14
A0SZ0
0/1*
R
13
A6SZ1
1
R/W
12
A6SZ0
1
R/W
11
A5SZ1
1
R/W
10
A5SZ0
1
R/W
9
A4SZ1
1
R/W
8
A4SZ0
1
R/W
Bit:
7
6
5
4
3
2
1
0
A3SZ1 A3SZ0 A2SZ1 A2SZ0 A1SZ1 A0SZ0
— PORTEN
Initial value:
1
1
1
1
1
1
0
0
R/W: R/W
R/W
R/W
R/W
R/W
R/W
—
R/W
Note: * These bits sample the values of the external pins that specify the area 0 bus size.
Bits 15 and 14—Area 0 Bus Width (A0SZ1, A0SZ0): These bits sample the external pins (MD3
and MD4) that specify the bus size in a power-on reset. They are read-only bits.
Bit 15: MD4
0
1
Bit 14: MD3
0
1
0
1
Bus Width
Reserved (Setting prohibited)
8 bits
16 bits
32 bits
Rev.4.00 Oct. 10, 2008 Page 357 of 1122
REJ09B0370-0400