SH7751 Datasheet, PDF (1115/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

CKIO
A25–A0
CSn
RD/WR
RD
D31–D0
(read)
WEn
D31–D0
(write)
BS
TS1
T1
23. Electrical Characteristics
T2
TH1
t_AD
t_CSD
t_RWD
t_RSD
t_RSD
t_AD
t_CSD
t_RWD
t_RSD
t_WED1
t_WDD
t_RDS
t_RDH
t_WEDF t_WEDF
t_WDD
t_WDD
t_BSD
t_BSD
RDY
DACKn
(SA: IO ← memory)
t_DACD
DACKn
(SA: IO → memory)
t_DACD
t_DACDF
DACKn
(DA)
t_DACD
t_DACD
t_DACDF
t_DACD
Legend:
IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 23.16 SRAM Bus Cycle: Basic Bus Cycle (No Wait, Address Setup/Hold Time
Insertion, AnS = 1, AnH = 1)
Rev.4.00 Oct. 10, 2008 Page 1017 of 1122
REJ09B0370-0400