SH7751 Datasheet, PDF (196/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

3. Memory Management Unit (MMU)
When a write is performed with the A bit in the address field set to 1, comparison of all the
UTLB entries is carried out using the VPN specified in the data field and PTEH.ASID. The
usual address comparison rules are followed, but if a UTLB miss occurs, the result is no
operation, and an exception is not generated. If the comparison identifies a UTLB entry
corresponding to the VPN specified in the data field, D and V specified in the data field are
written to that entry. If there is more than one matching entry, a data TLB multiple hit
exception results. This associative operation is simultaneously carried out on the ITLB, and if a
matching entry is found in the ITLB, V is written to that entry. Even if the UTLB comparison
results in no operation, a write to the ITLB side only is performed as long as there is an ITLB
match. If there is a match in both the UTLB and ITLB, the UTLB information is also written to
the ITLB.
31
24 23
Address field _{1 1 1 1 0 1 1 0}
14 13
87
E
A
210
31 30 29 28
Data field
VPN
10 9 8 7
DV
0
ASID
Legend:
VPN: Virtual page number
V: Validity bit
E: Entry
D: Dirty bit
ASID: Address space identifier
A: Association bit
: Reserved bits (0 write value, undefined read value)
Figure 3.16 Memory-Mapped UTLB Address Array
3.7.5 UTLB Data Array 1
UTLB data array 1 is allocated to addresses H'F700 0000 to H'F77F FFFF in the P4 area. A data
array access requires a 32-bit address field specification (when reading or writing) and a 32-bit
data field specification (when writing). Information for selecting the entry to be accessed is
specified in the address field, and PPN, V, SZ, PR, C, D, SH, and WT to be written to the data
array are specified in the data field.
In the address field, bits [31:23] have the value H'F70 indicating UTLB data array 1, and the entry
is selected by bits [13:8].
In the data field, PPN is indicated by bits [28:10], V by bit [8], SZ by bits [7] and [4], PR by bits
[6:5], C by bit [3], D by bit [2], SH by bit [1], and WT by bit [0].
The following two kinds of operation can be used on UTLB data array 1:
Rev.4.00 Oct. 10, 2008 Page 98 of 1122
REJ09B0370-0400