SH7751 Datasheet, PDF (422/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

12. Timer Unit (TMU)
Bits 15 to 9, 7, and 6 (Channels 0 and 1); Bits 15 to 10 (Channel 2)—Reserved: These bits are
always read as 0. A write to these bits is invalid, but the write value should always be 0.
Bit 9—Input Capture Interrupt Flag (ICPF) (Channel 2 Only): Status flag, provided in
channel 2 only, that indicates the occurrence of input capture.
Bit 9: ICPF
Description
0
Input capture has not occurred
[Clearing condition]
When 0 is written to ICPF
1
Input capture has occurred
[Setting condition]
When input capture occurs*
Note: * Writing 1 does not change the value.
(Initial value)
Bit 8—Underflow Flag (UNF): Status flag that indicates the occurrence of underflow.
Bit 8: UNF
Description
0
TCNT has not underflowed
[Clearing condition]
When 0 is written to UNF
1
TCNT has underflowed
[Setting condition]
When TCNT underflows*
Note: * Writing 1 does not change the value.
(Initial value)
Bits 7 and 6—Input Capture Control (ICPE1, ICPE0) (Channel 2 Only): These bits, provided
in channel 2 only, specify whether the input capture function is used, and control enabling or
disabling of interrupt generation when the function is used.
When the input capture function is used, a data transfer request is sent to the DMAC in the event
of input capture.
When using the input capture function, the TCLK pin must be designated as an input pin with the
TCOE bit in the TOCR register. The CKEG bits specify whether the rising edge or falling edge of
the TCLK signal is used to set the TCNT2 value in the input capture register (TCPR2).
Rev.4.00 Oct. 10, 2008 Page 324 of 1122
REJ09B0370-0400