SH7751 Datasheet, PDF (1058/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
Table 22.10 Access Size
Access Destination
PCI external
device
Memory space
I/O space
Configuration register
PCIC register
Legend:
B: Byte
W: Word
LW: Longword
Access Size
B, W, LW
B, W, LW
LW
LW
Transfer Mode
W/LW Boundary Byte Data
Mode
Boundary Mode
Yes
Yes
Yes
Yes
Yes
Yes
Yes
W/LW boundary
mode
Memory/I/O space access (Peripheral bus ↔ PCI bus)
Peripheral bus
Size
Address
Data
Data (W/LW
boundary mode)
PCI bus
Data (Byte data
boundary mode)
Address
(memory I/O)
BE[3:0]
31
4n+0 _B0
0 31
0 31
B0
0
B0 ^{4n+0/4n+0 1110}
Byte
4n+1
4n+2
B1
B2
B1
B2
B1
B2
4n+0/4n+1 1101
4n+0/4n+2 1011
4n+3
B3 B3
B3
4n+0/4n+3 0111
Word
4n+0
4n+2
Long
Word
4n+0
B0 B1
B0 B1
B1 B0 4n+0/4n+0 1100
B2 B3 B2 B3
B3 B2
4n+0/4n+2 0011
B0 B1 B2 B3 B0 B1 B2 B3 B3 B2 B1 B0 4n+0/4n+0 0000
Figure 22.18 Peripheral Bus ↔ PCI Bus Data Alignment
Rev.4.00 Oct. 10, 2008 Page 960 of 1122
REJ09B0370-0400