SH7751 Datasheet, PDF (199/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 4 Caches
4. Caches
4.1 Overview
4.1.1 Features
The SH7751 has an on-chip 8-Kbyte instruction cache (IC) for instructions and 16-Kbyte operand
cache (OC) for data. Half of the memory of the operand cache (8 Kbytes) can also be used as on-
chip RAM. The features of these caches are summarized in table 4.1.
The SH7751 has an on-chip 16-Kbyte instruction cache (IC) for instructions and 32-Kbyte
operand cache (OC) for data. Half of the operand cache memory (16 Kbytes) can also be used as
on-chip RAM. When the EMODE bit in the CCR register is cleared to 0 in the SH7751R, both the
IC and OC are set to SH7751 compatible mode. When the EMODE bit in the CCR register is set
to 1, the cache characteristics are as shown in table 4.2. After a power-on reset or manual reset, the
initial value of the EMODE bit is 0.
This LSI supports two 32-byte store queues (SQs) for performing high-speed writes to external
memory. SQ features are shown in table 4.3.
Table 4.1 Cache Features (SH7751)
Item
Capacity
Instruction Cache
8-Kbyte cache
Type
Line size
Entries
Write method
Direct mapping
32 bytes
256 entry
Operand Cache
16-Kbyte cache or 8-Kbyte cache +
8-Kbyte RAM
Direct mapping
32 bytes
512 entry
Copy-back/write-through selectable
Rev.4.00 Oct. 10, 2008 Page 101 of 1122
REJ09B0370-0400