SH7751 Datasheet, PDF (1173/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

23. Electrical Characteristics
23.3.6 Change in Delay Time Based on Load Capacitance
Figure 23.75 is a chart showing the changes in the delay time (reference data) when a load
capacitance equal to or larger than the stipulated value (30 pF) is connected to the LSI pins. When
connecting an external device with a load capacitance exceeding the regulation, use the chart in
figure 23.75 as reference for system design.
Note that if the load capacitance to be connected exceeds the range shown in figure 23.75 the
graph will not be a straight line.
+4.0 ns
+3.0 ns
+2.0 ns
+1.0 ns
+0.0 ns
+0 pF
+25 pF
Load capacitance
Figure 23.75 Load Capacitance−Delay Time
+50 pF
Rev.4.00 Oct. 10, 2008 Page 1075 of 1122
REJ09B0370-0400