SH7751 Datasheet, PDF (1009/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. PCI Controller (PCIC)
Bits 31 to 11—Reserved: These bits always return 0 when read. Always write 0 to these bits.
Bits 10 and 9—Alignment Mode (ALNMD): Sets data alignment when local bus is big endian
Bit 10: ALNMD10 Bit 9: ALNMD9 Description
0
0
Byte boundary mode
(Initial value)
1
W/LW boundary mode 1 (LW data is sent as byte × 4)
1
0
W/LW boundary mode 2 (LW data is sent as word × 2)
1
W/LW boundary mode 3 (LW data is sent as longword)
Legend:
W: Word
LW: Longword
Note: For details, refer to section 22.4, Endians.
Bit 8—DMA Transfer End Status (DMAST): Indicates the DMA transfer end status.
Bit 8: DMAST
0
1
Description
Normal termination
(Initial value)
Abnormal termination (Error detection or forced DMA transfer termination)
Bit 7—DMA Transfer Termination Interrupt Mask (DMAIM): Specifies the DMA transfer
termination interrupt mask.
Bit 7: DMAIM
0
1
Description
Interrupt disabled
Interrupt enabled
(Initial value)
Bit 6—DMA Transfer Termination Interrupt Status (DMAIS): Indicates the DMA transfer
termination interrupt status. The interrupt status is set even when the interrupt mask is set.
Bit 6: DMAIS
When writing
0
1
When reading
0
1
Description
Ignored
Status clear
Interrupt not detected
Interrupt detected
(Initial value)
Rev.4.00 Oct. 10, 2008 Page 911 of 1122
REJ09B0370-0400