SH7751 Datasheet, PDF (96/1224 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Table 23.10 Clock Timing (HD6417751RF240 (V))................................................................. 994
Table 23.11 Clock Timing (HD6417751RBP200 (V), HD6417751RBG200 (V)) .................... 995
Table 23.12 Clock Timing (HD6417751RF200 (V))................................................................. 995
Table 23.13 Clock Timing (HD6417751BP167 (V), HD6417751F167 (V))............................. 995
Table 23.14 Clock and Control Signal Timing
(HD6417751RBP240 (V), HD6417751RBG240 (V)) ....................................... 996
Table 23.15 Clock and Control Signal Timing (HD6417751RF240) .................................... 997
Table 23.16 Clock and Control Signal Timing
(HD6417751RBP200 (V), HD6417751RBG200 (V)) ....................................... 998
Table 23.17 Clock and Control Signal Timing (HD6417751RF200 (V)).............................. 999
Table 23.18 Clock and Control Signal Timing
(HD6417751BP167 (V), HD6417751F167 (V))................................................ 1000
Table 23.19 Control Signal Timing (1) .................................................................................. 1006
Table 23.20 Control Signal Timing (2) .................................................................................. 1007
Table 23.21 Bus Timing (1) ................................................................................................... 1010
Table 23.22 Bus Timing (2) ................................................................................................... 1012
Table 23.23 Peripheral Module Signal Timing (1)................................................................. 1061
Table 23.24 Peripheral Module Signal Timing (2)................................................................. 1063
Table 23.25 PCIC Signal Timing (in PCIREQ/PCIGNT Non-Port Mode) (1) ...................... 1069
Table 23.26 PCIC Signal Timing (in PCIREQ/PCIGNT Non-Port Mode) (2) ...................... 1070
Table 23.27 PCIC Signal Timing (With PCIREQ/PCIGNT Port Settings in Non-Host Mode)
(1) ....................................................................................................................... 1072
Table 23.28 PCIC Signal Timing (With PCIREQ/PCIGNT Port Settings in Non-Host Mode)
(2) ....................................................................................................................... 1072
Appendix A Address List
Table A.1 Address List ....................................................................................................... 1077
Appendix C Mode Pin Settings
Table C.1 Clock Operating Modes (SH7751).....................................................................
Table C.2 Clock Operating Modes (SH7751R) ..................................................................
Table C.3 Area 0 Memory Map and Bus Width .................................................................
Table C.4 Endian ................................................................................................................
Table C.5 Master/Slave.......................................................................................................
Table C.6 Clock Input.........................................................................................................
Table C.7 PCI Mode ...........................................................................................................
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Rev.4.00 Oct. 10, 2008 Page xcvi of xcviii
REJ09B0370-0400