SH7050 Datasheet, PDF (834/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Appendix B Pin States
Pin Function
Pin State
Reset
Power-Down
Item
Pins
Serial
TxD0–
Communi- TxD2
cation
Interface
(SCI)
RxD0–
RxD2
SCK0–
SCK2
Power-On Reset by RES pin
Bus-
ROMless,
Expanded,
8-Bit
ROMless,
Expanded,
16-Bit
Expanded,
with ROM
Single-
Chip
Hardware
Standby
Software
Standby
Released
Sleep _State
—
—
—
—
Z
O^*
O
O
—
—
—
—
Z
Z
I
I
—
—
—
—
Z
K^*
I/O
I/O
A/D
AN0–AN15
Z
Z
Z
Z
Z
Z
I
I
Converter _ADTRG
—
—
—
—
Z
Z
I
I
ADEND
—
—
—
—
Z
O^*
O
O
I/O Port POD
—
—
—
—
Z
Z
I
I
PA0–PA15
—
—
Z
Z
Z
K^*
I/O
I/O
PB0–PB5
Z
Z
Z
Z
Z
K^*
I/O
I/O
PB6–PB11
—
—
Z
Z
Z
K^*
I/O
I/O
PC0–PC4
—
—
—
Z
Z
K^*
I/O
I/O
PC5–PC14
Z
Z
Z
Z
Z
K^*
I/O
I/O
PD0–PD7
—
—
Z
Z
Z
K^*
I/O
I/O
PD8–PD15
Z
—
Z
Z
Z
K^*
I/O
I/O
PE0–PE14
Z
Z
Z
Z
Z
K^*
I/O
I/O
PF0–PF11
Z
Z
Z
Z
Z
K^*
I/O
I/O
PG0–PG15
Z
Z
Z
Z
Z
K^*
I/O
I/O
PH0–PH15
Z
Z
Z
Z
Z
Z
I
I
I: Input
O: Output
H: High-level Output
L: Low-level Output
Z: High-impedance
K: Input pins are in the high-impedance state; output pins maintain their previous state.
Note: * When the HIZ bit of the standby control register (SBYCR) is set to 1, output pins are in
high impedance state.
Rev. 5.00 Jan 06, 2006 page 814 of 818
REJ09B0273-0500