English
Language : 

SH7050 Datasheet, PDF (688/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/
Section 22 Electrical Characteristics
22.3.5 Advanced Timer Unit Timing and Advanced Pulse Controller Timing
Table 22.8 Advanced Timer Unit Timing and Advanced Pulse Controller Timing
Conditions: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, AVREF = 4.5 V to AVCC, VSS = AVSS = 0 V,
Ta = –40 to +85°C
Item
Symbol Min
Output compare output delay time
tTOCD
—
Input capture input setup time
tTICS
35
PULS output delay time
t
—
PLSD
Timer input setup time
tTCKS
50
Timer clock pulse width (single edge tTCKWH/L
1.5
specification)
Timer clock pulse width (both edges t
2.5
TCKWH/L
specified)
Max
50
—
50
—
—
—
Unit
ns
ns
ns
ns
tcyc
t
cyc
Figure
22.14
22.15
CK
Timer output
Input capture
input
PULS output
tTOCD
tTICS
tPLSD
Figure 22.14 ATU I/O Timing
Rev. 5.00 Jan 06, 2006 page 668 of 818
REJ09B0273-0500