SH7050 Datasheet, PDF (232/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 10 Advanced Timer Unit (ATU)
10.1.6 Register and Counter Configuration
Table 3 summarizes the ATU registers.
Table 10.3 ATU Registers
Channel Name
Abbrevia-
Initial
tion
R/W Value Address
Access Size
Common Prescaler register 1
PSCR1 R/W H'00 H'FFFF82E9 8 bits
Timer start register
TSTR R/W H'0000 H'FFFF82EA 16 bits
0
Trigger selection register TGSR R/W H'00 H'FFFF8280 8 bits
Timer I/O control register 0A TIOR0A R/W H'00 H'FFFF8281 8 bits
Interval interrupt request
register
Timer status register AH
ITVRR R/W H'00 H'FFFF8282 8 bits
TSRAH R/(W)^*1 H'00 H'FFFF8283 8 bits
Timer interrupt enable
register A
Timer status register AL
TIERA R/W H'00 H'FFFF8284 8 bits
TSRAL R/(W)^*1 H'00 H'FFFF8285 8 bits
Free-running counter 0H TCNT0H R/W H'0000 H'FFFF8288 32 bits
Free-running counter 0L
TCNT0L R/W H'0000
Input capture register 0AH ICR0AH R
H'0000 H'FFFF828C 32 bits
Input capture register 0AL ICR0AL R
H'0000
Input capture register 0BH ICR0BH R
H'0000 H'FFFF8290 32 bits
Input capture register 0BL ICR0BL R
H'0000
Input capture register 0CH ICR0CH R
H'0000 H'FFFF8294 32 bits
Input capture register 0CL ICR0CL R
H'0000
Input capture register 0DH ICR0DH R
H'0000 H'FFFF8298 32 bits
Input capture register 0DL ICR0DL R
H'0000
1
Timer control register 1
TCR1 R/W H'00 H'FFFF82C0 8 bits 16 bits
Timer I/O control register 1A TIOR1A R/W H'00 H'FFFF82C1 8 bits
Timer I/O control register 1B TIOR1B R/W H'00 H'FFFF82C2 8 bits 16 bits
Timer I/O control register 1C TIOR1C R/W H'00 H'FFFF82C3 8 bits
Timer interrupt enable
register B
Timer status register B
TIERB
TSRB
R/W H'00 H'FFFF82C4 8 bits
R/(W)^*1 H'00 H'FFFF82C5 8 bits
Free-running counter 1
TCNT1 R/W H'0000 H'FFFF82D0 16 bits
Rev. 5.00 Jan 06, 2006 page 212 of 818
REJ09B0273-0500