SH7050 Datasheet, PDF (464/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 14 A/D Converter
14.2.4 A/D Control/Status Register 1 (ADCSR1)
A/D control/status register 0 (ADCSR1) is an 8-bit readable/writable register whose functions
include selection of the A/D conversion mode for A/D1.
ADCSR1 is initialized to H'00 by a power-on reset, and in hardware standby mode and software
standby mode.
Bit: 7
6
5
4
3
2
1
0
ADF ADIE ADST SCAN CKS
—
CH1 CH0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)* R/W R/W R/W R/W
R
R/W R/W
Note: * Only 0 can be written, to clear the flag.
Bit 7—A/D End Flag (ADF): Same as ADF in ADCSR0.
Bit 6—A/D Interrupt Enable (ADIE): Same as ADIE in ADCSR0.
Bit 5—A/D Start (ADST): Same as ADST in ADCR0.
Bit 4—Scan Mode (SCAN): Selects single mode or scan mode for A/D1. To prevent incorrect
operation, ensure that the ADST bit is cleared to 0 before switching the operating mode.
Bit 4:
SCAN
0
1
Description
Single mode
Scan mode
(Initial value)
For details of the operation in single mode and scan mode, see section 14.4, Operation.
Bit 3—Clock Select (CKS): Same as CKS in ADCR0.
Bit 2—Reserved: This bit is always read as 0, and should only be written with 0.
Rev. 5.00 Jan 06, 2006 page 444 of 818
REJ09B0273-0500