SH7050 Datasheet, PDF (244/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 10 Advanced Timer Unit (ATU)
Timer Control Register 10 (TCR10)
Bit: 7
6
5
4
3
2
1
0
— CKSEL CKSEL CKSEL — CKSEL CKSEL CKSEL
2A
1A
0A
2B
1B
0B
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W
R
R/W R/W R/W
Bit 7—Reserved: This bit is always read as 0, and should only be written with 0.
Bits 6 to 4—Clock Select 2A to 0A (CKSEL2A to CKSEL0A): These bits select clock φ",
scaled from the internal clock source, for DCNT10A to DCNT10F in channel 10, from φ', φ'/2,
φ'/4, φ'/8, φ'/16, and φ'/32. DCNT10A to DCNT10F all count on the same synchronous clock.
Bit 6:
Bit 5:
Bit 4:
CKSEL2A CKSEL1A CKSEL0A Description
0
0
0
Internal clock φ": counting on φ'
1
Internal clock φ": counting on φ'/2
1
0
Internal clock φ": counting on φ'/4
1
Internal clock φ": counting on φ'/8
1
0
0
Internal clock φ": counting on φ'/16
1
Internal clock φ": counting on φ'/32
1
0
Cannot be set
1
Cannot be set
(Initial value)
Bit 3—Reserved: This bit is always read as 0, and should only be written with 0.
Rev. 5.00 Jan 06, 2006 page 224 of 818
REJ09B0273-0500