SH7050 Datasheet, PDF (389/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 13 Serial Communication Interface (SCI)
Section 13 Serial Communication Interface (SCI)
13.1 Overview
The SH7050 series has a serial communication interface (SCI) with three independent channels,
both of which possess the same functions.
The SCI supports both asynchronous and clock synchronous serial communication. It also has a
multiprocessor communication function for serial communication among two or more processors.
13.1.1 Features
• Select asynchronous or clock synchronous as the serial communications mode.
• Asynchronous mode: Serial data communications are synched by start-stop in character units.
The SCI can communicate with a universal asynchronous receiver/transmitter (UART), an
asynchronous communication interface adapter (ACIA), or any other chip that employs a
standard asynchronous serial communication. It can also communicate with two or more other
processors using the multiprocessor communication function. There are twelve selectable
serial data communication formats.
 Data length: seven or eight bits
 Stop bit length: one or two bits
 Parity: even, odd, or none
 Multiprocessor bit: one or none
 Receive error detection: parity, overrun, and framing errors
 Break detection: by reading the RxD level directly when a framing error occurs
• Clocked synchronous mode: Serial data communication is synchronized with a clock signal.
The SCI can communicate with other chips having a clock synchronous communication
function. There is one serial data communication format.
 Data length: eight bits
 Receive error detection: overrun errors
• Full duplex communication: The transmitting and receiving sections are independent, so the
SCI can transmit and receive simultaneously. Both sections use double buffering, so
continuous data transfer is possible in both the transmit and receive directions.
• On-chip baud rate generator with selectable bit rates.
• Internal or external transmit/receive clock source: baud rate generator (internal) or SCK pin
(external).
Rev. 5.00 Jan 06, 2006 page 369 of 818
REJ09B0273-0500