SH7050 Datasheet, PDF (742/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Appendix A On-Chip Supporting Module Registers
Input Capture Registers
0AH, L to 0DH, L
(ICR0AH, L to ICR0DH, L)
H'FFFF828C (Channel 0) 32
H'FFFF828E (Channel 0)
H'FFFF8290 (Channel 0) 32
H'FFFF8292 (Channel 0)
H'FFFF8294 (Channel 0) 32
H'FFFF8296 (Channel 0)
H'FFFF8298 (Channel 0) 32
H'FFFF829A (Channel 0)
ATU
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Bit name:
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit name:
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R R R R
Bit
31–0
Bit Name
(Dedicated input capture register)
Description
Stores TCNT value when input capture signal is
generated
Rev. 5.00 Jan 06, 2006 page 722 of 818
REJ09B0273-0500