SH7050 Datasheet, PDF (562/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 18 ROM (128 kB Version)
18.2.6 Block Configuration
The flash memory is divided into three 32 kB blocks, one 28 kB blocks, and four 1 kB blocks.
Address H'00000
32 kB
32 kB
128 kB
32 kB
Address H'1FFFF
28 kB
1 kB
1 kB
1 kB
1 kB
18.3 Pin Configuration
The flash memory is controlled by means of the pins shown in table 18.1.
Table 18.1 Flash Memory Pins
Pin Name
Reset
Flash memory enable
Mode 3
Mode 2
Mode 1
Mode 0
Transmit data
Receive data
Abbreviation
RES
FWE
MD3
MD2
MD1
MD0
TxD1
RxD1
I/O
Input
Input
Input
Input
Input
Input
Output
Input
Function
Reset
Flash program/erase protection by hardware
Sets SH7050 operating mode
Sets SH7050 operating mode
Sets SH7050 operating mode
Sets SH7050 operating mode
Serial transmit data output
Serial receive data input
Rev. 5.00 Jan 06, 2006 page 542 of 818
REJ09B0273-0500