SH7050 Datasheet, PDF (254/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 10 Advanced Timer Unit (ATU)
Bit 2—ICR0D Input Trigger (TRG0D): Selects whether a pin (TIOD) or the channel 1
compare-match signal (TRG1A) is to be used as the channel 0 input capture register (ICR0D)
input trigger.
Bit 2:
TRG0D
0
1
Description
Input pin (TIOD) used as input trigger
Channel 1 compare-match signal (TRG1A) used as input trigger
(Initial value)
Bit 1—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 0—ICR0A Input Trigger (TRG0A): Selects whether a pin (TIOA) or the channel 1
compare-match signal (TRG1A) is to be used as the channel 0 input capture register (ICR0A)
input trigger.
Bit 0:
TRG0A
0
1
Description
Input pin (TIOA) used as input trigger
Channel 1 compare-match signal (TRG1A) used as input trigger
(Initial value)
Rev. 5.00 Jan 06, 2006 page 234 of 818
REJ09B0273-0500