SH7050 Datasheet, PDF (591/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 18 ROM (128 kB Version)
Table 18.11 Programmer Mode Commands
Command Name
Number
of Cycles Mode
1st Cycle
Address Data
2nd Cycle
Mode Address Data
Memory read mode 1 + n
Write X
H'00
Read RA
Dout
Auto-program mode 129
Write X
H'40
Write WA
Din
Auto-erase mode
2
Write X
H'20
Write X
H'20
Status read mode 2
Write X
H'71
Write X
H'71
Notes: 1. In auto-program mode. 129 cycles are required for command writing by a simultaneous
128-byte write.
2. In memory read mode, the number of cycles depends on the number of address write
cycles (n).
18.11.3 Memory Read Mode
1. After completion of auto-program/auto-erase/status read operations, a transition is made to the
command wait state. When reading memory contents, a transition to memory read mode must
first be made with a command write, after which the memory contents are read.
2. In memory read mode, command writes can be performed in the same way as in the command
wait state.
3. Once memory read mode has been entered, consecutive reads can be performed.
4. After powering on, memory read mode is entered.
Rev. 5.00 Jan 06, 2006 page 571 of 818
REJ09B0273-0500