SH7050 Datasheet, PDF (800/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Appendix A On-Chip Supporting Module Registers
Compare Match Timer Control/
Status Register (CMCSR)
H'FFFF83D2 (Channel 0)
H'FFFF83D8 (Channel 1)
8/16/32
Bit: 15
14
13
12
11
10
9
Bit name: —
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
CMT
8
—
0
R
Bit: 7
6
5
4
3
2
1
0
Bit name: CMF CMIE
—
—
—
—
CKS1 CKS0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)* R/W
—
—
—
—
R/W R/W
Note: * Only 0 can be written, to clear the flag.
Bit
Bit Name
Value Description
7
Compare match flag
0
CMCNT and CMCOR values do not match
(CMF)
(Initial value)
[Clearing condition]
Read CMF when CMF =1, then write 0 in CMF
1
CMCNT and CMCOR values match
6
Compare match interrupt 0
Compare match interrupt (CMI) disabled
enable (CMIE)
(Initial value)
1
Compare match interrupt (CMI) enabled
1, 0
Clock select 1 and 0
(CKS1, CKS0)
0 0 φ/8
1 φ/32
(Initial value)
1 0 φ/128
1 φ/512
Rev. 5.00 Jan 06, 2006 page 780 of 818
REJ09B0273-0500