SH7050 Datasheet, PDF (571/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 18 ROM (128 kB Version)
18.6.1 Boot Mode
When boot mode is used, the flash memory programming control program must be prepared in the
host beforehand. The SCI to be used is set to channel asynchronous mode.
When a reset-start is executed after the SH7050 pins have been set to boot mode, the boot program
built into the SH7050 is started and the programming control program prepared in the host is
serially transmitted to the SH7050 via the channel 1 SCI. In the SH7050, the programming control
program received via the channel 1 SCI is written into the programming control program area in
on-chip RAM. After the transfer is completed, control branches to the start address of the
programming control program area and the programming control program execution state is
entered (flash memory programming is performed).
The transferred programming control program must therefore include coding that follows the
programming algorithm given later.
The system configuration in boot mode is shown in figure 18.3, and the boot mode execution
procedure in figure 18.4.
SH7050
Flash memory
Host
Write data reception
Verify data transmission
RXD1
SCI1
TXD1
On-chip RAM
Figure 18.3 System Configuration in Boot Mode
Rev. 5.00 Jan 06, 2006 page 551 of 818
REJ09B0273-0500