SH7050 Datasheet, PDF (638/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 19 ROM (256 kB Version)
Program mode
Erase mode
RES = 0 or HSTBY = 0
Reset or standby
(hardware protection)
RD VF PR ER FLER = 0
RD VF PR ER FLER = 0
Error
occurrence
Error occurrence
(software standby)
RES = 0 or
HSTBY = 0
RES = 0 or
HSTBY = 0
FLMCR1, FLMCR2,
EBR1, EBR2
initialization state
Error protection mode
Software
standby mode
Error protection mode
(software standby)
RD VF PR ER FLER = 1
Software standby
mode release
RD VF PR ER FLER = 1
FLMCR1, FLMCR2, EBR1,
EBR2 initialization state
Legend:
RD: Memory read possible
VF: Verify-read possible
PR: Programming possible
ER: Erasing possible
RD: Memory read not possible
VF: Verify-read not possible
PR: Programming not possible
ER: Erasing not possible
Figure 19.9 Flash Memory State Transitions
Rev. 5.00 Jan 06, 2006 page 618 of 818
REJ09B0273-0500