SH7050 Datasheet, PDF (459/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 14 A/D Converter
The operation of the A/D converter after ADF is set to 1 differs between single mode and scan
mode.
In single mode, after the A/D converter transfers the digit value to ADDR, ADF is set to 1 and the
A/D converter enters the idle state. In scan mode, after all conversions end within one selected
analog group, ADF is set to 1 and conversion is continued. For example, in the case of 12-channel
scanning, ADF is set to 1 immediately after the end of conversion for AN0 to AN3 (group 0)
It is not possible to write 1 to ADF.
Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the A/D interrupt (ADI).
To prevent incorrect operation, ensure that the ADST bit in A/D control register 0 (ADCR0) is
cleared to 0 before switching the operating mode.
Bit 6:
ADIE
0
1
Description
A/D interrupt (ADI0) is disabled
A/D interrupt (ADI0) is enabled
(Initial value)
When A/D conversion ends and the ADF bit in ADCSR0 is set to 1, an A/D0 A/D interrupt
(ADI0) will be generated If the ADIE bit is 1. ADI0 is cleared by clearing ADF or ADIE to 0.
Bits 5 and 4: A/D Mode 1 and 0 (ADM1, ADM0): These bits select the A/D conversion mode
from single mode, 4-channel scan mode, 8-channel scan mode, and 12-channel scan mode.
To prevent incorrect operation, ensure that the ADST bit in A/D control register 0 (ADCR0) is
cleared to 0 before switching the operating mode.
Bit 5:
ADM1
0
1
Bit 4:
ADM0
0
1
0
1
Description
Single mode
4-channel scan mode (analog group 0/1/2)
8-channel scan mode (analog groups 0 and 1)
12-channel scan mode (analog groups 0, 1, and 2)
(Initial value)
Rev. 5.00 Jan 06, 2006 page 439 of 818
REJ09B0273-0500