SH7050 Datasheet, PDF (415/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 13 Serial Communication Interface (SCI)
Table 13.8 Serial Mode Register Settings and SCI Communication Formats
Mode
Bit 7
C/A
SMR Settings
Bit 6 Bit 5 Bit 2
CHR PE MP
Bit 3
STOP
Asynchronous 0
0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
Asynchronous
(multiprocessor
format)
0
*
1
0
*
1
1
*
0
*
1
Clock
1
*
*
*
*
synchronous
Note: Asterisks (*) in the table indicate don’t-care bits.
SCI Communication Format
Data Parity Multipro- Stop Bit
Length Bit cessor Bit Length
8-bit Not set Not set 1 bit
2 bits
Set
1 bit
2 bits
7-bit Not set
1 bit
2 bits
Set
1 bit
2 bits
8-bit Not set Set
1 bit
2 bits
7-bit
1 bit
2 bits
8-bit
Not set None
Table 13.9 SMR and SCR Settings and SCI Clock Source Selection
Mode
SMR
Bit 7
C/A
SCR Settings
Bit 1 Bit 0
CKE1 CKE0
SCI Transmit/Receive Clock
Clock Source
SCK Pin Function*
Asynchronous 0
0
0
Internal SCI does not use the SCK pin
1
Outputs a clock with frequency
matching the bit rate
1
0
External Inputs a clock with frequency 16 times
1
the bit rate
Clock synch-
1
0
0
Internal Outputs the synchronous clock
ronous
1
1
0
External Inputs the synchronous clock
1
Note: * Select the function in combination with the pin function controller (PFC).
Rev. 5.00 Jan 06, 2006 page 395 of 818
REJ09B0273-0500