SH7050 Datasheet, PDF (832/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Appendix B Pin States
Appendix B Pin States
B.1 Pin States at Reset and in Power-Down, and Bus Right Released
State
Table B.1 shows the SH7050 pin states at reset and in power-down, and bus right released state.
Table B.1 Pin States at Reset and in Power-Down, and Bus Right Released State
Pin Function
Pin State
Reset
Power-Down
Item
Pins
Power-On Reset by RES pin
Bus-
ROMless,
Expanded,
8-Bit
ROMless,
Expanded,
16-Bit
Expanded,
with ROM
Single-
Chip
Hardware
Standby
Software
Standby
Released
Sleep _State
Clock
EXTAL
I
I
I
I
Z
Z
I
I
XTAL
CK
O
O
O
O
Z
Z
O
O
O
O
O
O
Z
H^*
O
O
Operating FWE,
I
I
I
I
I
I
I
I
Mode
MD0–MD3
Selection _HSTBY
I
I
I
I
I
I
I
I
System RES
I
I
I
I
I
I
I
I
Control _WDTOVF
O
O
O
O
Z
H^*
O
O
BREQ
—
—
—
—
Z
Z
I
I
BACK
—
—
—
—
Z
Z
O
O
Interrupt NMI
I
I
I
I
I
I
I
I
IRQ0–
IRQ7
—
—
—
—
Z
Z
I
I
IRQOUT
—
—
—
—
Z
H^*
O
O
Address A0–A21
L
Bus
L
—
—
Z
Z
O
Z
Data Bus D0–D7
Z
Z
—
—
Z
Z
I/O
Z
D8–D15
—
Z
—
—
Z
Z
I/O
Z
Rev. 5.00 Jan 06, 2006 page 812 of 818
REJ09B0273-0500