SH7050 Datasheet, PDF (799/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

System Control Register
(SYSCR)
Bit: 7
6
Bit name: —
—
Initial value: 0
0
R/W: R
R
Bit
Bit Name
0
RAM enable (RAME)
Appendix A On-Chip Supporting Module Registers
H'FFFF83C8
8
Power-Down State
5
4
3
2
—
—
—
—
0
0
0
0
R
R
R
R
Value
0
1
Description
On-chip RAM disabled
On-chip RAM enabled
1
0
— RAME
0
1
R
R/W
(Initial value)
Compare Match Timer Start Register
(CMSTR)
H'FFFF83D0
(All Channels)
Bit: 15
14
13
12
11
Bit name: —
—
—
—
—
Initial value: 0
0
0
0
0
R/W: R
R
R
R
R
Bit: 7
6
5
4
3
Bit name: —
—
—
—
—
Initial value: 0
0
0
0
0
R/W: R
R
R
R
R
Bit
Bit Name
Value Description
1
Count start 1 (STR1)
0
CMCNT1 halted
1
CMCNT1 counts
0
Count start 0 (STR0)
0
CMCNT0 halted
1
CMCNT0 counts
8/16/32
CMT
10
9
8
—
—
—
0
0
0
R
R
R
2
1
0
—
STR1 STR0
0
0
0
R
R/W R/W
(Initial value)
(Initial value)
Rev. 5.00 Jan 06, 2006 page 779 of 818
REJ09B0273-0500