SH7050 Datasheet, PDF (617/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 19 ROM (256 kB Version)
Bit 3—Erase-Verify 1 (EV1): Selects erase-verify mode transition or clearing (applicable
addresses: H'00000 to H'1FFFFF). Do not set the SWE, ESU1, PSU1, PV1, E1, or P1 bit at the
same time.
Bit 3:
EV1
0
1
Description
Erase-verify mode cleared
Transition to erase-verify mode
[Setting condition]
When FWE = 1 and SWE = 1
(Initial value)
Bit 2—Program-Verify 1 (PV1): Selects program-verify mode transition or clearing (applicable
addresses: H'00000 to H'1FFFFF). (Do not set the SWE, ESU1, PSU1, EV1, E1, or P1 bit at the
same time.
Bit 2:
PV1
0
1
Description
Program-verify mode cleared
Transition to program-verify mode
[Setting condition]
When FWE = 1 and SWE = 1
(Initial value)
Bit 1—Erase 1 (E1): Selects erase mode transition or clearing (applicable addresses: H'00000 to
H'1FFFFF). Do not set the SWE, ESU1, PSU1, EV1, PV1, or P1 bit at the same time.
Bit 1:
E1
0
1
Description
Erase mode cleared
Transition to erase mode
[Setting condition]
When FWE = 1, SWE = 1, and ESU1 = 1
(Initial value)
Rev. 5.00 Jan 06, 2006 page 597 of 818
REJ09B0273-0500