SH7050 Datasheet, PDF (294/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 10 Advanced Timer Unit (ATU)
10.2.12 Free-Running Counters (TCNT)
The free-running counters (TCNT) are 32- or 16-bit up-counters. The ATU has ten TCNT
counters: one 32-bit TCNT in channel 0, and one 16-bit TCNT in each of channels 1 to 9.
Channel
0
1
2
3
4
5
6
7
8
9
Abbreviation
TCNT0H,
TCNT0L
TCNT1
TCNT2
TCNT3
TCNT4
TCNT5
TCNT6
TCNT7
TCNT8
TCNT9
Description
32-bit up-counter (initial value H'00000000)
16-bit up-counters (initial value H'0000)
16-bit up-counters (initial value H'0001)
Free-Running Counter 0H, L (TCNT0H, TCNT0L): Free-running counter 0 (comprising
TCNT0H and TCNT0L) is a 32-bit readable/writable register that counts on an input clock. The
input clock is selected with prescaler register 1 (PSCR1).
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
When TCNT0 overflows (from H'FFFFFFFF to H'00000000), the OVF0 overflow flag in the
timer status register (TSR) is set to 1.
TCNT0 is connected to the CPU via an internal 16-bit bus, and can only be accessed by a
longword read or write. Word reads or writes cannot be used..
Rev. 5.00 Jan 06, 2006 page 274 of 818
REJ09B0273-0500