SH7050 Datasheet, PDF (269/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 10 Advanced Timer Unit (ATU)
Bit 5—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 4—Cycle Register Compare-Match Flag (CMF7): Status flag that indicates CYLR7
compare-match.
Bit 4:
CMF7
0
1
Description
[Clearing condition])
When CMF7 is read while set to 1, then 0 is written in CMF7
[Setting condition]
When TCNT7 = CYLR7
(Initial value)
Bit 3—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 2—Cycle Register Compare-Match Flag (CMF8): Status flag that indicates CYLR8
compare-match.
Bit 2:
CMF8
0
1
Description
[Clearing condition]
When CMF8 is read while set to 1, then 0 is written in CMF8
[Setting condition]
When TCNT8 = CYLR8
(Initial value)
Bit 1—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 0—Cycle Register Compare-Match Flag (CMF9): Status flag that indicates CYLR9
compare-match.
Bit 0:
CMF9
0
1
Description
[Clearing condition]
When CMF9 is read while set to 1, then 0 is written in CMF9
[Setting condition]
When TCNT9 = CYLR9
(Initial value)
Rev. 5.00 Jan 06, 2006 page 249 of 818
REJ09B0273-0500