SH7050 Datasheet, PDF (514/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 16 Pin Function Controller (PFC)
16.3.7 Port D IO Register (PDIOR)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The port D IO register (PDIOR) is a 16-bit readable/writable register that selects the input/output
direction of the 16 pins in port D. Bits PD15IOR to PD0IOR correspond to pins PD15/D15 to
PD0/D0. PDIOR is enabled when port D pins function as general input/output pins (PD15 to
PD0), and disabled otherwise.
When port D pins function as PD15 to PD0, a pin becomes an output when the corresponding bit
in PDIOR is set to 1, and an input when the bit is cleared to 0.
PDIOR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby wode. It is not initialized in software standby mode or sleep mode.
16.3.8 Port D Control Register (PDCR)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
MD MD MD MD MD MD MD MD MD MD MD MD MD MD MD MD
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The port D control register (PDCR) is a 16-bit readable/writable register that selects the functions
of the 16 multiplex pins in port D. PDCR settings are not valid in all operating modes.
1. Expanded mode with on-chip ROM disabled (area 0: 8-bit bus)
Port D pins D0 to D7 function as data bus input/output pins, and PDCR settings are invalid.
2. Expanded mode with on-chip ROM disabled (area 0: 16-bit bus)
Port D pins function as data bus input/output pins, and PDCR settings are invalid.
3. Expanded mode with on-chip ROM enabled
Port D pins are multiplexed as data bus input/output pins and general input/output pins. PDCR
settings are valid.
4. Single-chip mode
Port D pins function as general input/output pins, and PDCR settings are invalid.
Rev. 5.00 Jan 06, 2006 page 494 of 818
REJ09B0273-0500