SH7050 Datasheet, PDF (145/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 8 Bus State Controller (BSC)
8.3.2 Wait State Control
The number of wait states inserted into ordinary space access states can be controlled using the
WCR settings (figure 8.4).
T₁
T_W
T₂
CK
Address
Read
CSn
RD
Data
Write
WRx
Data
Figure 8.4 Wait Timing of Ordinary Space Access (Software Wait Only)
Rev. 5.00 Jan 06, 2006 page 125 of 818
REJ09B0273-0500