SH7050 Datasheet, PDF (712/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Appendix A On-Chip Supporting Module Registers
A.2 Registers
Register name
Abbreviation
of register
name
Address onto
which register
is mapped
Serial Mode Register (SMR)
H'FFFF81A0 (Channel 0) 8/16
Access
size
SCI
Name of on-chip
supporting
module
Bit No.
Initial
value
Bit: 7
6
5
4
3
2
1
0
Bit name: C/A
CHR
PE
O/E STOP MP CKS1 CKS0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit Bit Name
7 Communication mode (C/A)
6 Character length (CHR)
5 Parity enable (PE)
Type of access permitted
R Read only 4
W Write only
R/W Read or wr3ite
Parity mode (O/E)
Stop bit length (STOP)
2 Multiprocessor bit (MP)
1, 0 Clock select 1, 0
(CKS1, CKS0)
Value
0
1
0
1
0
1
0
1
0
1
0
1
00
1
10
1
Description
Asynchronous mode (Initial value)
Synchronous mode
8-bit data
(Initial value)
7-bit data
Parity bit addition and check disabled
(Initial value)
Parity bit addition and check enabled
Even parity
(Initial value)
Odd parity
1 stop bit
(Initial value)
2 stop bits
Multiprocessor function disabled
(Initial value)
Multiprocessor format selected
φ clock
(Initial value)
φ/4 clock
φ/16 clock
φ/64 clock
Bit names
(abbreviations).
Bits marked “—”
are reserved.
Full name
of bit
Description
of bit function
Rev. 5.00 Jan 06, 2006 page 692 of 818
REJ09B0273-0500