SH7050 Datasheet, PDF (618/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 19 ROM (256 kB Version)
Bit 0—Program 1 (P1): Selects program mode transition or clearing (applicable addresses:
H'00000 to H'1FFFFF). Do not set the SWE, PSU1, ESU1, EV1, PV1, or E1 bit at the same time.
Bit 0:
P1
0
1
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE = 1, and PSU1 = 1
(Initial value)
19.5.2 Flash Memory Control Register 2 (FLMCR2)
FLMCR2 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode for addresses H'20000 to H'3FFFF is entered by setting SWE (FLMCR1) to
1 when FWE (FLMCR1) = 1, then setting the EV2 or PV2 bit. Program mode for addresses
H'20000 to H'3FFFF is entered by setting SWE (FLMCR1) to 1 when FWE (FLMCR1) = 1, then
setting the PSU2 bit, and finally setting the P2 bit. Erase mode for addresses H'20000 to H'3FFFF
is entered by setting SWE (FLMCR1) to 1 when FWE (FLMCR1) = 1, then setting the ESU2 bit,
and finally setting the E2 bit. FLMCR2 is initialized to H'00 by a reset, in hardware standby mode
and software standby mode, when a low level is input to the FWE pin, and when a high level is
input to the FWE pin and the SWE bit in FLMCR1 is not set (the exception is the FLER bit, which
is initialized only by a reset and in hardware standby mode). When on-chip flash memory is
disabled, a read will return H'00, and writes are invalid.
Writes to bits SWE, ESU2, PSU2, EV2, and PV2 in FLMCR2 are enabled only when FWE
(FLMCR1) = 1 and SWE (FLMCR1) = 1; writes to the E2 bit only when FWE (FLMCR1) = 1,
SWE (FLMCR1) = 1, and ESU2 = 1; and writes to the P2 bit only when FWE (FLMCR1) = 1,
SWE (FLMCR1) = 1, and PSU2 = 1.
Bit: 7
6
5
4
3
2
1
0
FLER
—
ESU2 PSU2 EV2
PV2
E2
P2
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R/W R/W R/W R/W R/W R/W
Rev. 5.00 Jan 06, 2006 page 598 of 818
REJ09B0273-0500