SH7050 Datasheet, PDF (475/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 14 A/D Converter
14.4.5 A/D Converter Activation by ATU
The A/D0 converter module can be activated by an A/D conversion request from the ATU’s
channel 0 interval timer.
To activate the A/D converter by means of the ATU, set the TRGE bit to 1 in A/D control register
0 (ADCR0) and clear the EXTRG bit to 0 in the A/D trigger register (ADTRGR). When an ATU
channel 0 interval timer A/D conversion request is generated after these settings have been made,
the ADST bit set to 1. The timing from setting of the ADST bit until the start of A/D conversion is
the same as when 1 is written into the ADST bit by software.
14.4.6 ADEND Output Pin
When channel 15 is used in scan mode, the conversion timing can be monitored with the ADEND
output pin.
After the channel 15 analog voltage has been latched in scan mode, and conversion has started, the
ADEND pin goes high. The ADEND pin subsequently goes low when channel 15 conversion
ends.
ADEND
State of channel 12
(AN12)
Idle
A/D
conversion
Idle
State of channel 13
(AN13)
Idle
A/D
conversion
Idle
State of channel 14
(AN14)
Idle
A/D
conversion
A/D
conversion
Idle
A/D
conversion
Idle
State of channel 15 _A/D
(AN15) conversion
Idle
A/D
conversion
Idle
Figure 14.7 ADEND Output Timing
Rev. 5.00 Jan 06, 2006 page 455 of 818
REJ09B0273-0500