SH7050 Datasheet, PDF (140/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 8 Bus State Controller (BSC)
Bit 15:
W33
0
0
1
Bit 14:
W32
0
0
⋅⋅⋅
1
Bit 13:
W31
0
0
1
Bit 12:
W30
0
1
1
Description
No wait (external wait input disabled)
1 wait external wait input enabled
15 wait external wait input enabled (initial value)
Bits 11–8—CS2 Space Wait Specification (W23, W22, W21, W20): Specifies the number of
waits for CS2 space access.
Bit 11:
W23
0
0
1
Bit 10:
W22
0
0
⋅⋅⋅
1
Bit 9:
W21
0
0
1
Bit 8:
W20
0
1
1
Description
No wait (external wait input disabled)
1 wait external wait input enabled
15 wait external wait input enabled (initial value)
Bits 7–4—CS1 Space Wait Specification (W13, W12, W11, W10): Specifies the number of
waits for CS1 space access.
Bit 7:
W13
0
0
1
Bit 6:
W12
0
0
⋅⋅⋅
1
Bit 5:
W11
0
0
1
Bit 4:
W10
0
1
1
Description
No wait (external wait input disabled)
1 wait external wait input enabled
15 wait external wait input enabled (initial value)
Bits 3–0—CS0 Space Wait Specification (W03, W02, W01, W00): Specifies the number of
waits for CS0 space access.
Bit 3:
W03
0
0
1
Bit 2:
W02
0
0
⋅⋅⋅
1
Bit 1:
W01
0
0
1
Bit 0:
W00
0
1
1
Description
No wait (external wait input disabled)
1 wait external wait input enabled
15 wait external wait input enabled (initial value)
Rev. 5.00 Jan 06, 2006 page 120 of 818
REJ09B0273-0500