SH7050 Datasheet, PDF (143/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 8 Bus State Controller (BSC)
Table 8.5 RAM Area Setting Method (128 kB ROM/6 kB RAM Version)
RAM Area
H'FFFF E800 to H'FFFF EBFF
H'0001 F000 to H'0001 F3FF
H'0001 F400 to H'0001 F7FF
H'0001 F800 to H'0001 FBFF
H'0001 FC00 to H'0001 FFFF
*: Don’t care
Bit 2: RAMS
0
1
1
1
1
Bit 1: RAM1
*
0
0
1
1
Bit 0: RAM0
*
0
1
0
1
Table 8.6 RAM Area Setting Method (256 kB ROM/10 kB RAM Version)
RAM Area
H'FFFF D800 to H'FFFF DBFF
H'0003 F000 to H'0003 F3FF
H'0003 F400 to H'0003 F7FF
H'0003 F800 to H'0003 FBFF
H'0003 FC00 to H'0003 FFFF
*: Don’t care
Bit 2: RAMS
0
1
1
1
1
Bit 1: RAM1
*
0
0
1
1
Bit 0: RAM0
*
0
1
0
1
Rev. 5.00 Jan 06, 2006 page 123 of 818
REJ09B0273-0500