SH7050 Datasheet, PDF (30/841 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/

Section 1 Overview
Type
Clock
System
control
Operating
mode control
Interrupts
Symbol
EXTAL
XTAL
CK
RES
WDTOVF
BREQ
BACK
MD0 to
MD3
HSTBY
NMI
IRQ0 to
IRQ7
Pin No.
110
I/O
Input
108
Input
125
Output
126
Input
51
Output
135
Input
134
Output
120, 119, Input
111, 109
124
Input
112
Input
106, 114, Input
116, 117, 6,
8, 54, 133
Name
External clock
Crystal
System clock
Power-on
reset
Watchdog
timer overflow
Bus request
Bus request
acknowledge
Mode setting
Hardware
standby
Nonmaskable
interrupt
Interrupt
requests
0 to 7
Function
For connection to a crystal
resonator. An external clock
source can also be
connected to the EXTAL pin.
For connection to a crystal
resonator.
Supplies the system clock to
peripheral devices.
Executes a power-on reset
when driven low.
WDT overflow output signal.
Driven low when an external
device requests the bus.
Indicates that the bus has
been granted to an external
device. The device that
output the BREQ signal
recognizes that the bus has
been acquired when it
receives the BACK signal.
These pins determine the
operating mode. Do not
change the input values
during operation.
When driven low, this pin
forces a transition to
hardware standby mode.
Nonmaskable interrupt
request pin.
Acceptance on the rising
edge or falling edge can be
selected.
Maskable interrupt request
pins.
Level input or edge input can
be selected.
Rev. 5.00 Jan 06, 2006 page 10 of 818
REJ09B0273-0500