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SH-2A Datasheet, PDF (83/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family | |||
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Section 5 Instruction Set
5.1.9 Bit Manipulation Instructions
Table 5.11 Bit Manipulation Instructions
Compatibility
Instruction
Code
Operation
Cycles
T Bit
SH2E
SH4
New
SH-2A/
SH2A-
FPU
BAND.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 (imm of (disp+Rn)) & T
3 Opera-
Yes
0100dddddddddddd â T
tion
result
BANDNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 ~ (imm of (disp+Rn)) &
3 Opera-
Yes
1100dddddddddddd T â T
tion
result
BCLR.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 0 â (imm of (disp+Rn)) 3
â
Yes
0000dddddddddddd
BCLR
#imm3, Rn
10000110nnnn0iii 0â imm of Rn
1
â
Yes
BLD.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 (imm of (disp+Rn)) â T 3 Opera-
Yes
0011dddddddddddd
tion
result
BLD
#imm3, Rn
10000111nnnn1iii imm of Rn â T
1 Opera-
Yes
tion
result
BLDNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 ~ (imm of (disp+Rn)) â 3 Opera-
Yes
T
1011dddddddddddd
tion
result
BOR.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 (imm of (disp+ Rn)) | T
3 Opera-
Yes
0101dddddddddddd â T
tion
result
BORNOT.B #imm3,@(disp12,Rn) 0011nnnn0iii1001 ~ (imm of (disp+ Rn)) |
3 Opera-
Yes
1101dddddddddddd T â T
tion
result
BSET.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 1 â (imm of (disp+Rn)) 3
â
Yes
0001dddddddddddd
BSET
#imm3, Rn
10000110nnnn1iii 1 â imm of Rn
1
â
Yes
BST.B
#imm3,@(disp12,Rn) 0011nnnn0iii1001 T â (imm of (disp+Rn)) 3
â
Yes
0010dddddddddddd
BST
#imm3, Rn
10000111nnnn0iii T â imm of Rn
1
â
Yes
BXOR.B
#imm3, @(disp12, Rn) 0011nnnn0iii1001 (imm of (disp+ Rn)) ^ T 3 Opera-
Yes
âT
0110dddddddddddd
tion
result
Rev. 3.00 Jul 08, 2005 page 69 of 484
REJ09B0051-0300
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