SH-2A Datasheet, PDF (288/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
Operation
XOR(long m,long n) /* XOR Rm,Rn */
{
R[n]^=R[m];
PC+=2;
}
XORI(long i) /* XOR #imm,R0 */
{
R[0]^=(0x000000FF & (long)i);
PC+=2;
}
XORM(long i) /* XOR.B #imm,@(R0,GBR) */
{
long temp;
temp=(long)Read_Byte(GBR+R[0]);
temp^=(0x000000FF & (long)i);
Write_Byte(GBR+R[0],temp);
PC+=2;
}
Examples:
XOR R0,R1
; Before execution:
; After execution:
XOR #H'F0,R0
; Before execution:
; After execution:
XOR.B #H'A5,@(R0,GBR) ; Before execution:
; After execution:
R0 = H'AAAAAAAA, R1 = H'55555555
R1 = H'FFFFFFFF
R0 = H'FFFFFFFF
R0 = H'FFFFFF0F
@(R0,GBR) = H'A5
@(R0,GBR) = H'00
Rev. 3.00 Jul 08, 2005 page 274 of 484
REJ09B0051-0300