SH-2A Datasheet, PDF (308/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
6.5.8 FLDI1
1.0 Load
Floating-point LoaD
Immediate 1.0
Floating-Point Instruction
Format
FLDI1 FRn
—
Abstract
0x3F800000 → FRn
—
Code
Cycle
1111nnnn10011101 1
—
—
T Bit
—
—
Description
When FPSCR.PR = 0, this instruction loads floating-point 1.0 (0x3F800000) into FRn.
If FPCSR.PR = 1, the instruction is handled as an illegal instruction.
Operation
void FLDI1(int n)
{
FR[n] = 0x3F800000;
pc += 2;
}
Possible Exceptions:
None
Rev. 3.00 Jul 08, 2005 page 294 of 484
REJ09B0051-0300