SH-2A Datasheet, PDF (292/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
case NZERO:register_copy(m,n); break;
default:
break;
}
break;
case PZERO: switch (data_type_of(n)){
case NZERO: zero(n,0); break;
default:
break;
}
break;
case NZERO: break;
case PINF: switch (data_type_of(n)){
case NINF:
invalid(n);
break;
default:
inf(n,0);
break;
}
break;
case NINF: switch (data_type_of(n)){
case PINF:
invalid(n);
break;
default:
inf(n,1);
break;
}
break;
}
}
FADD Special Cases
FRm,DRm
FRn,DRn
NORM
+0
–0
+INF
–INF
qNaN
NORM ADD
–INF
+0
+0
–0
–0
+INF
+INF Invalid
–INF
–INF
Invalid –INF
qNaN
qNaN
sNaN
Note: When DN = 1, the value of a denormalized number is treated as 0.
sNaN
Invalid
Rev. 3.00 Jul 08, 2005 page 278 of 484
REJ09B0051-0300