SH-2A Datasheet, PDF (10/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

6.4.3 ADDV ........ ADD with (V flag) overflow check
...................................................... Arithmetic Instruction ............. 159
6.4.4 AND .......... AND logical ................................ Logical Instruction................... 161
6.4.5 BF .............. Branch if False ............................ Branch Instruction ................... 163
6.4.6 BF/S ........... Branch if False with delay Slot ... Branch Instruction ................... 165
6.4.7 BRA ........... BRAnch ....................................... Branch Instruction ................... 167
6.4.8 BRAF ......... BRAnch Far ................................ Branch Instruction ................... 169
6.4.9 BSR ............ Branch to SubRoutine ................. Branch Instruction ................... 171
6.4.10 BSRF ......... Branch to SubRoutine Far ........... Branch Instruction ................... 173
6.4.11 BT .............. Branch if True ............................. Branch Instruction ................... 175
6.4.12 BT/S ........... Branch if True with delay Slot .... Branch Instruction ................... 177
6.4.13 CLRMAC .. CleaR MAC register .................... System Control Instruction...... 179
6.4.14 CLRT ......... CleaR T bit .................................. System Control Instruction...... 180
6.4.15 CMP/cond .. CoMPare conditionally ............... Arithmetic Instruction ............. 181
6.4.16 DIV0S ........ DIVide (step 0) as Signed ........... Arithmetic Instruction ............. 185
6.4.17 DIV0U ....... DIVide (step 0) as Unsigned ....... Arithmetic Instruction ............. 186
6.4.18 DIV1 .......... DIVide 1 step .............................. Arithmetic Instruction ............. 187
6.4.19 DMULS.L .. Double-length MULtiply as Signed
...................................................... Arithmetic Instruction ............. 192
6.4.20 DMULU.L Double-length MULtiply as Unsigned
...................................................... Arithmetic Instruction ............. 194
6.4.21 DT .............. Decrement and Test ..................... Arithmetic Instruction ............. 196
6.4.22 EXTS ......... EXTend as Signed ....................... Arithmetic Instruction ............. 197
6.4.23 EXTU ........ EXTend as Unsigned ................... Arithmetic Instruction ............. 198
6.4.24 JMP ............ JuMP ........................................... Branch Instruction ................... 199
6.4.25 JSR ............. Jump to SubRoutine .................... Branch Instruction ................... 201
6.4.26 LDC ........... LoaD to Control register ............. System Control Instruction...... 203
6.4.27 LDS ............ LoaD to System register .............. System Control Instruction...... 205
6.4.28 MAC.L ....... Multiply and ACcumulate Long .. Arithmetic Instruction ............. 207
6.4.29 MAC.W ..... Multiply and ACcumulate Word Arithmetic Instruction ............. 211
6.4.30 MOV .......... MOVe data .................................. Data Transfer Instruction......... 214
6.4.31 MOV .......... MOVe immediate data ................ Data Transfer Instruction......... 219
6.4.32 MOV .......... MOVe peripheral Data ................ Data Transfer Instruction......... 222
6.4.33 MOV .......... MOVe structure data ................... Data Transfer Instruction......... 225
6.4.34 MOVA ....... MOVe effective Address ............. Data Transfer Instruction......... 228
6.4.35 MOVT ....... MOVe T bit ................................. Data Transfer Instruction......... 230
6.4.36 MUL.L ....... MULtiply Long ........................... Arithmetic Instruction ............. 231
6.4.37 MULS.W ... MULtiply as Signed Word .......... Arithmetic Instruction ............. 232
6.4.38 MULU.W ... MULtiply as Unsigned Word ...... Arithmetic Instruction ............. 233
6.4.39 NEG ........... NEGate ........................................ Arithmetic Instruction ............. 234
6.4.40 NEGC ........ NEGate with Carry ...................... Arithmetic Instruction ............. 235
Rev. 3.00 Jul 08, 2005 page x of xiv