SH-2A Datasheet, PDF (25/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

2.3 Data Formats
Section 2 Programming Model
2.3.1 Data Format in Registers
Register operands are always longwords (32 bits). When data in memory is loaded to a register
and the memory operand is only a byte (8 bits) or a word (16 bits), it is sign-extended into a
longword when stored into a register.
31
0
Longword
2.3.2 Data Formats in Memory
Byte, word, and longword data formats are used. Memory can be accessed in 8-bit bytes, 16-bit
words, or 32-bit longwords. A memory operand of fewer than 32 bits is stored in a register in
sign-extended or zero-extended form.
A word operand should be accessed starting from a word boundary (2-byte even address: address
2n), and a longword operand from a longword boundary (4-byte even address: address 4n). If this
rule is not observed, an address error will occur. A byte operand can be accessed from any
address.
Only big-endian byte order can be selected for the data format.
Data formats in memory are shown in figure 2.4.
Address 2n
Address 4n
Address m + 1 Address m + 3
Address m
Address m + 2
31
23
15
7
0
Byte Byte Byte Byte
Word
Word
Longword
Big-endian
Figure 2.4 Data Format in Memory
Rev. 3.00 Jul 08, 2005 page 11 of 484
REJ09B0051-0300